;-------------------------------------------------
;       AKI-H8 test : April 1998
;-------------------------------------------------

;##### Port Defines #####
smr     .equ    h'0fffb0
brr     .equ    h'0fffb1
scr     .equ    h'0fffb2
tdr     .equ    h'0fffb3
ssr     .equ    h'0fffb4
rdr     .equ    h'0fffb5
p6ddr   .equ    h'0fffc9
p6dr    .equ    h'0fffcb
pbddr   .equ    h'0fffd4
pbdr    .equ    h'0fffd6

;##### Vector Defines #####
        .section vector,data,locate=h'000000
        .data.l start

;##### Work RAM Data Defines #####
        .section ram,data,locate=h'0fef10
timer1  .res.w  1
timer2  .res.w  1
counter .res.b  1

;##### Program Area #####
        .section program,code,locate=h'000100

start:
        mov.l   #h'0fff10,er7           ; stack pointer set
        mov.l   #h'0fef10,er6
        mov.w   #h'0fe0,r1
        mov.b   #0,r0l
_ram_clear:
        mov.b   r0l,@er6
        inc.l   #1,er6
        dec.w   #1,r1
        bne     _ram_clear
        jsr     @sci0_init              ; SCI initialize
        mov.b   #b'11111111,r0l
        mov.b   r0l,@p6ddr              ; set : Port[6] all output
        mov.b   #b'11111111,r0l
        mov.b   r0l,@pbddr              ; set : Port[B] all output
        jsr     @wait_500msec
        mov.b   #b'00100000,r0l         ; tx/rx start !
        mov.b   r0l,@scr
loop:
        jsr     @timer_check
        jmp     @loop

tx_send:
        btst.b  #7,@ssr                 ; test TRDE
        beq     tx_send
        mov.b   r0l,@tdr
        bclr.b  #7,@ssr                 ; Transmit !
        rts

sci0_init:
        mov.b   #b'00000000,r0l
        mov.b   r0l,@scr
        mov.b   #b'00000000,r0l
        mov.b   r0l,@smr
        mov.b   #15,r0l
        mov.b   r0l,@brr
        mov.w   #500,r0
_sci0_wait:
        dec.w   #1,r0
        bne     _sci0_wait
        mov.b   @ssr,r0l                ; (dummy read)
        mov.b   #b'10000000,r0l
        mov.b   r0l,@ssr
        rts

timer_check:
        mov.w   @timer1,r1
        inc.w   #1,r1
        mov.w   r1,@timer1
        beq     _timer_1
        rts
_timer_1:
        mov.w   @timer2,r1
        inc.w   #1,r1
        mov.w   r1,@timer2
        cmp.w   #25,r1
        bne     _timer_2
        mov.w   #0,r1
        mov.w   r1,@timer2
_timer_2:
        mov.b   @counter,r0l
        inc.b   r0l
        mov.b   r0l,@counter
        mov.b   r0l,@pbdr               ; write to Port[B]
        jsr     @tx_send
        rts

        .end
