;----------------------------------------------------------------: ; | ; N A K A M U R A S P E C I A L M O D U L E | ; | ; for NO.1 : MIDI Performance Trigger System | ; | ;----------------------------------------------------------------: ;========== Data Area ===================================== dseg abs d_area(04000h) para_area: ds 128 ; (dummy) rx_fifo: ds 256 ; Internal UART : MIDI(1) RX tx_fifo: ds 256*16 ; TX mode_fifo: ds 256*8 ; Echo Mode time_fifo: ds 256*8 ; Echo Time Value iseg abs i_area(0ff00h) int_flg: ds 1 ; Interrupt Check Flags rx_top: ds 1 ; MIDI Receive FIFO Top Pointer rx_end: ds 1 ; MIDI Receive FIFO End Pointer rx_data: ds 1 ; MIDI Received 1 Byte Data Buffer status: ds 1 ; MIDI Status Buffer channel: ds 1 ; MIDI Channel Buffer rsb: ds 1 ; Running Status Buffer dcb: ds 1 ; Data Count Buffer data_1st: ds 1 ; ( Key Number Buffer ) data_2nd: ds 1 ; ( Velocity Buffer ) tx_top: ds 2 ; MIDI Transmit FIFO Top Pointer tx_end: ds 2 ; MIDI Transmit FIFO End Pointer echo_mode: ds 1 ; Echo Mode Selector echo_counter: ds 1 ; Echo Check Counter echo_top: ds 8 ; Echo FIFO Top Pointer echo_end: ds 8 ; Echo FIFO End Pointer timer_1msec: ds 1 ; 1msec Timer ad_buffer: ds 2 ; A/D Data Buffer note_status: ds 2 ; Note Event Status note_ctr: ds 2 ; Note Event Counter select_ctr: ds 2 ; Phrase Select Number Counter select_buf: ds 2 ; Phrase Select Buffer selected: ds 1 ; Phrase Select Number point_buff: ds 4 ; Pointer [HL] Buffer event_mode: ds 1 ; MSB : [0]=ON / [1]=OFF free_timer: ds 1 ; Semi-Random Counter end_mark: ds 3 ; Use for Debug ! ;========== Bit Map Defines Area ========================== int_bit_midi equ 0 ; Int_Flg ; MIDI int_bit_tim_1 equ 1 ; 1msec ;========== RAM / Port Area =============================== user_area equ 04000h ; Universal RAM Area Top Address dsp-01 equ 0fa00h ; Tone Generator [DSP-01] : FA00-FBFF internal_ram equ 0fdc0h ; Internal RAM Top Address port_p01cr equ 0ffc2h ; Port 0/1 Control port_p2cr equ 0ffc5h ; Port-2 Control port_iop3 equ 0ffc6h ; Port-3 port_p3cr equ 0ffc7h ; Port-3 Control port_p4cr equ 0ffc9h ; Port-4 Control port_iop5 equ 0ffcah ; Port-5 port_smmod equ 0ffcbh ; Stepping Motor Mode port_iop6 equ 0ffcch ; Port-6 port_iop7 equ 0ffcdh ; Port-7 port_p67cr equ 0ffceh ; Port-6/7 Control port_iop8 equ 0ffd0h ; Port-8 port_p8cr equ 0ffd1h ; Port-8 Control port_wdmod equ 0ffd2h ; Watch Dog Timer Mode port_wdcr equ 0ffd3h ; Watch Dog Timer Control port_treg0 equ 0ffd4h ; 16bit Timer <0/1> port_treg2 equ 0ffd6h ; 8bit Timer <2> port_treg3 equ 0ffd7h ; 8bit Timer <3> port_tclk equ 0ffd8h ; Timer Source Control port_tmod equ 0ffdah ; Timer Mode port_trun equ 0ffdbh ; Timer/Serial Baud Rate port_treg5 equ 0ffe2h ; 16bit Timer <5> [low] port_t4mod equ 0ffe4h ; 16bit Timer Mode port_t4ffcr equ 0ffe5h ; 16bit Timer Control port_intel equ 0ffe6h ; Interrupt Enable Mask [low] port_inteh equ 0ffe7h ; Interrupt Enable Mask [high] port_dmaeh equ 0ffe8h ; Micro DMA Enable Mask [high] port_scmod equ 0ffe9h ; Serial Channel Mode port_sccr equ 0ffeah ; Serial Channel Control port_scbuf equ 0ffebh ; Serial Channel Buffer port_bx equ 0ffech ; Bank Register x port_by equ 0ffedh ; Bank Register y port_option_x equ 0fff0h ; DSR Bit : [Read] --> Active [Low] port_option_y equ 0fff1h ; DRR Bit : [Read] --> Active [Low] port_option_z equ 0fff2h ; CLR DRR : [Read] --> Clear INT0 port_option_d equ 0fff3h ; CLR DSR : Initial=[Read] port_rs232c equ 0fff8h ; External UART(1) --> INT1 port_ex_midi equ 0fffah ; External UART(2) --> INT2 port_data equ 0fffch ; MPU Data Get Port (RD) : INT0 port_command equ 0fffdh ; MPU Command Get Port (RD) : INT0 port_send equ 0fffeh ; MPU Data Send Port (WR) port_system equ 0ffffh ; System Port (WR) 6bit ;========== MACRO Defines ================================= %define(midi_put) local ex( push hl ld hl,(tx_top) ld de,tx_fifo add hl,de ld (hl),b incw (tx_top) bit 4,(tx_top+1) jr z,%ex ldw (tx_top),0 %ex: pop hl ) %define(midi_set(memory))( ld b,(%memory) %midi_put ) %define(echo_machine(ch)) local pass off echo note back loop( cp (echo_mode),%ch jp nz,%pass ld a,(echo_end+%ch) cp a,(echo_top+%ch) jp z,_int_1msec_next ; None Event ! ld (echo_counter),a %loop: ld hl,time_fifo+256*%ch dec (hl+a) jr z,%echo %back: inc (echo_counter) ld a,(echo_counter) cp a,(echo_top+%ch) jp z,_int_1msec_next jr %loop %echo: inc (echo_end+%ch) ld hl,mode_fifo+256*%ch ld l,(hl+a) ; Phrase Number ld e,l ld (event_mode),l and l,01111111b mul hl,45 ld bc,percus_bank+5*(%ch+1) add hl,bc %if(%ch ne 7)then( push hl ld a,2+5 ld b,(hl+a) ld a,(echo_top+%ch+1) ld hl,time_fifo+256*(%ch+1) ld (hl+a),b ; Next Time Set ! ld hl,mode_fifo+256*(%ch+1) ld (hl+a),e ; Next Mode Set ! inc (echo_top+%ch+1) pop hl )fi ld a,3 bit 7,(hl+a) jr z,%note bit 7,(event_mode) jp nz,%back ld b,(hl) dec b and b,00001111b or b,0c0h %midi_put ld a,1 ld b,(hl+a) %midi_put jp %back %note: ld a,4 cp (hl+a),0 jp z,%back ld b,(hl) dec b and b,00001111b or b,090h %midi_put ld a,3 ld b,(hl+a) %midi_put bit 7,(event_mode) jr nz,%off ld a,4 ld b,(hl+a) %midi_put jp %back %off: ld b,0 %midi_put jp %back %pass: ) %define(get_ad_port)( ld a,(port_iop5) ) ;========== Head Program Area ============================= cseg abs c_area(0) cold_start: di ld sp,0ffc0h call system_initial ; System Initialize jp main_loop ;========== Interrupt Vector/Sequence ===================== org 10h ; Software Interrupt : SWI reti org 18h ; Non Mascable Interrupt : NMI reti org 20h ; Watch Dog Timer : INTWD reti org 28h ; External Interrupt #0 : INT0 ld a,(port_option_z) reti org 30h ; Timer Interrupt #0 : INTT0 reti org 38h ; Timer Interrupt #1 : INTT1 reti org 40h ; Timer Interrupt #2 : INTT2 reti org 48h ; Timer Interrupt #3 : INTT3 set int_bit_tim_1,(int_flg) reti org 50h ; Timer Interrupt #4 : INTT4 reti org 58h ; External Interrupt #1 : INT1 reti org 60h ; Timer Interrupt #5 : INTT5 reti org 68h ; External Interrupt #2 : INT2 reti org 70h ; UART Receive Interrupt : INTRX push bc push hl ld b,(port_scbuf) jr _int_midi_rx org 78h ; UART Transmit Interrupt : INTTX set int_bit_midi,(int_flg) reti _int_midi_rx: cp b,0f8h jr z,_int_rx_pass ld hl,rx_fifo ld a,(rx_top) ld (hl+a),b ; MIDI Receive FIFO Set ! inc (rx_top) _int_rx_pass: pop hl pop bc reti ;========== System Initialize Routine ===================== system_initial: ld a,(port_option_x) ; DSR Clear ld a,(port_option_y) ; DRR Clear ld a,(port_option_z) ; INT Clear ld a,(port_option_d) ; DSR F/F Clear ld (port_option_z),00000000b ; ld (port_option_y),00000000b ; ld (port_option_x),00001000b ; MIDI Gate ON ld (port_wdmod),01110000b ; Watch Dog OFF ld (port_wdcr),0b1h ; Watch Dog OFF ld (port_intel),01011111b ; Interrupt Enable ld (port_inteh),00000101b ; Interrupt Enable ld (port_dmaeh),00000000b ; Micro DMA Disable ld (port_p01cr),00000110b ; Port 0/1 = Data/Address Bus ld (port_p2cr),11111111b ; Port 2 = Address Bus ld (port_p3cr),10101001b ; Port 3 = UART ld (port_sccr),00000000b ; Port 3 = Constant ld (port_p4cr),00001111b ; Port 4 = Bank Address ld (port_smmod),00000000b ; Port 6/7 = Port ld (port_p67cr),11111111b ; Port 6/7 = Output ld (port_p8cr),00001000b ; Port 8 = Output/Buzzer ld (port_scmod),00101000b ; UART Control ld (port_trun),10101111b ; Baud Rate ld (port_tmod),00000100b ; 8bit Timer Mode ld (port_tclk),10010001b ; Timer Assign ld (port_t4mod),00000110b ; 16bit Timer Mode ld (port_t4ffcr),00001011b ; 16bit Timer Control ldw (port_treg0),0ffffh ; (dummy) Tempo zzz: ld (port_treg2),2 ; MIDI Divide Rate : 12MHz=[3] ld (port_treg3),187 ; 1msec Interval Constant(1) ldw (port_treg5),017h ; Start Buzzer Pitch ld (port_bx),00h ; ROM/RAM Area ld (port_by),08h ; Debug Bank : Address = 80000-8FFFF ld (port_iop6),0ffh ; LED Off ld (port_iop7),0ffh ; ld (port_iop3),11111011b ; DSP-01 Reset ! call wait_timer ; (wait) ld (port_iop3),11111111b ; DSP-01 Start ! call wait_timer ; (wait) ld (dsp-01+0f5h),0 ; Memory Bus Close nop ld (dsp-01+0f3h),0 ; Memory Bus Close ld hl,04000h ld bc,08000h ; 4000-BFFF Clear _ps_ram_clear: ld (hl),0 inc hl djnz bc,_ps_ram_clear ld hl,internal_ram ; Internal RAM Area ld bc,512-16 _int_ram_clear: ld (hl),0 inc hl djnz bc,_int_ram_clear ld (select_ctr+0),0 ld (select_ctr+1),32 ld (end_mark),'*' ld (end_mark+1),'*' ld (end_mark+2),'*' %get_ad_port ld b,a and a,00000001b ld (ad_buffer+0),a ld a,b and a,00000010b ld (ad_buffer+1),a ld (port_option_z),00000000b ld (port_option_y),00000000b ld (port_option_x),00001000b ld a,(port_option_z) ld a,(port_scbuf) ; Dummy Rx ld (port_scbuf),0fch ; Dummy Tx ld a,(port_option_y) ei ret wait_timer: ld bc,0ffffh _wait_loop: nop djnz bc,_wait_loop ret ;========== Main Program ================================== main_loop: call rx_midi_check call tx_midi_check call ad_port_check call int_timer_check jr main_loop rx_midi_check:;-------------------------------------------- ld a,(rx_end) cp a,(rx_top) ret z ld hl,rx_fifo ld b,(hl+a) ld (rx_data),b inc (rx_end) bit 7,b jr z,midi_running cp b,0f0h ret nc ld a,b ld (status),a and b,11110000b ld (rsb),b and a,00001111b ld (channel),a ld (dcb),0 ret midi_running: ld a,(rsb) cp a,0 ret z cp (dcb),0 jr nz,_midi_run_2nd ld (data_1st),b cp a,0c0h jr z,midi_prog_change ld (dcb),1 ret midi_prog_change: %midi_set(status) %midi_set(data_1st) ret _midi_run_2nd: ld (data_2nd),b ld (dcb),0 cp a,080h jr z,midi_note_off cp a,090h jr z,midi_note_on cp a,0e0h jr z,midi_pitch_bend cp a,0b0h jp z,_midi_run_2nd_ct ld (rsb),0 ret midi_note_off: ld a,(status) add a,10h ld (status),a ld (data_2nd),0 midi_note_on: %midi_set(status) %midi_set(data_1st) %midi_set(data_2nd) ret midi_pitch_bend: %midi_set(status) %midi_set(data_1st) %midi_set(data_2nd) ret _midi_run_2nd_ct: cp (data_1st),121 jr c,midi_cont_change ret midi_cont_change: %midi_set(status) %midi_set(data_1st) %midi_set(data_2nd) ret tx_midi_check:;-------------------------------------------- ld hl,(tx_end) cp hl,(tx_top) ; FIFO Event ? ret z bit int_bit_midi,(int_flg) ; TX OK ? ret z ld de,tx_fifo add hl,de ld a,(hl) ld (port_scbuf),a res int_bit_midi,(int_flg) incw (tx_end) bit 4,(tx_end+1) ret z ldw (tx_end),0 ret ad_port_check:;-------------------------------------------- inc (free_timer) %get_ad_port ld b,a and a,00000001b cp a,(ad_buffer+0) jr nz,_ad_event_0 ld a,b and a,00000010b cp a,(ad_buffer+1) jr nz,_ad_event_1 ret _ad_event_0: ld (ad_buffer+0),a cp (note_status+0),0 jr nz,_ad_eve_off_0 cp (ad_buffer+0),0 ret z ld (note_status+0),1 ; Note ON !! call perc_eve_1_on _ad_eve_off_0: ld (note_ctr+0),0 ret _ad_event_1: ld (ad_buffer+1),a cp (note_status+1),0 jr nz,_ad_eve_off_1 cp (ad_buffer+1),0 ret z ld (note_status+1),1 ; Note ON !! call perc_eve_2_on _ad_eve_off_1: ld (note_ctr+1),0 ret int_timer_check:;------------------------------------------ bit int_bit_tim_1,(int_flg) ret z res int_bit_tim_1,(int_flg) bit 0,(timer_1msec) ; Odd/Even ? jr z,_int_1msec_even ld (port_treg3),125 ; Constant(1) : 12MHz=[187] jr _int_1msec_cont _int_1msec_even: ld (port_treg3),125 ; Constant(2) : 12MHz=[188] _int_1msec_cont: inc (timer_1msec) dec (echo_mode) and (echo_mode),00000111b %echo_machine(0) %echo_machine(1) %echo_machine(2) %echo_machine(3) %echo_machine(4) %echo_machine(5) %echo_machine(6) %echo_machine(7) _int_1msec_next: cp (note_status+0),0 jr z,_int_eve_off_1 inc (note_ctr+0) cp (note_ctr+0),20 ; Gate Time ret nz ld (note_status+0),0 ; Note OFF !! ld a,(select_buf+0) or a,10000000b ld (selected),a ld hl,(point_buff+0) call perc_event_off ret _int_eve_off_1: cp (note_status+1),0 ret z inc (note_ctr+1) cp (note_ctr+1),20 ; Gate Time ret nz ld (note_status+1),0 ; Note OFF !! ld a,(select_buf+1) or a,10000000b ld (selected),a ld hl,(point_buff+2) call perc_event_off ret perc_eve_1_on:;-------------------------------------------- ld a,(select_ctr+0) ; Phrase Number inc (select_ctr+0) and (select_ctr+0),00011111b ; Max = 32 ld (select_buf+0),a ld (selected),a ld l,45 mul hl,a ld bc,percus_bank add hl,bc ld (point_buff+0),hl jr _perc_eve perc_eve_2_on: ld a,(free_timer) and a,00011111b ; Max = 32 add a,32 cp a,(select_ctr+1) jr nz,_perc_2_ok add a,19 and a,00011111b add a,32 _perc_2_ok: ld (select_ctr+1),a ; Phrase Number ld (select_buf+1),a ld (selected),a ld l,45 mul hl,a ld bc,percus_bank add hl,bc ld (point_buff+2),hl _perc_eve: ld a,3 bit 7,(hl+a) jr z,_eve_note ld b,(hl) or b,0c0h %midi_put ld a,1 ld b,(hl+a) %midi_put jp _eve_joint _eve_note: ld a,4 cp (hl+a),0 jp z,_eve_joint ld b,(hl) dec b and b,00001111b or b,090h %midi_put ld a,3 ld b,(hl+a) %midi_put ld a,4 ld b,(hl+a) %midi_put jr _eve_joint perc_event_off: ld a,3 bit 7,(hl+a) jr nz,_eve_joint ld a,4 cp (hl+a),0 jr z,_eve_joint ld b,(hl) dec b and b,00001111b or b,090h %midi_put ld a,3 ld b,(hl+a) %midi_put ld b,0 %midi_put _eve_joint: ld a,2+5 ld b,(hl+a) ld a,(echo_top) ld hl,time_fifo ld (hl+a),b ld b,(selected) ld hl,mode_fifo ld (hl+a),b inc (echo_top) ret ;========== Data Base Area ================================ ; Format : Channel / Prog / Time / KeyNo / Speed ; Master 1-16 0-127 0 0-127 0-127 ; Echo 1 1-16 0-127 1-127 0-127 0-127 ; | | | | | | ; Echo 8 1-16 0-127 1-127 0-127 0-127 ; --- If KeyNo < 128 , then Prog.Change is ignored. percus_bank: ;--------------------------------------------------------------- ; CH Prog Time Note Vel ;--------------------------------------------------------------- db 4 , 20 , 0 , 60 , 64 ; Master NO.0 db 8 , 21 , 48 , 67 , 64 ; Echo #1 db 2 , 0 , 11 , 0 , 0 ; #2 db 3 , 0 , 11 , 0 , 0 ; #3 db 5 , 0 , 11 , 0 , 0 ; #4 db 6 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 4 , 0 , 58 , 64 ; Master NO.1 db 5 , 28 , 28 , 60 , 64 ; Echo #1 db 9 , 29 , 36 , 67 , 48 ; #2 db 8 , 30 , 11 , 222 , 0 ; #3 db 3 , 0 , 11 , 0 , 0 ; #4 db 4 , 0 , 11 , 0 , 0 ; #5 db 6 , 0 , 11 , 0 , 0 ; #6 db 7 , 0 , 11 , 0 , 0 ; #7 db 7 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 12 , 0 , 60 , 64 ; Master NO.2 db 8 , 30 , 56 , 67 , 48 ; Echo #1 db 5 , 28 , 40 , 65 , 72 ; #2 db 2 , 4 , 24 , 60 , 64 ; #3 db 4 , 14 , 11 , 222 , 0 ; #4 db 6 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 4 , 0 , 60 , 64 ; Master NO.3 db 6 , 5 , 32 , 67 , 48 ; Echo #1 db 3 , 6 , 11 , 222 , 0 ; #2 db 4 , 0 , 11 , 0 , 0 ; #3 db 5 , 0 , 11 , 0 , 0 ; #4 db 7 , 0 , 11 , 0 , 0 ; #5 db 8 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 14 , 0 , 67 , 64 ; Master NO.4 db 7 , 13 , 44 , 60 , 56 ; Echo #1 db 3 , 6 , 20 , 65 , 64 ; #2 db 2 , 22 , 11 , 222 , 0 ; #3 db 6 , 15 , 11 , 222 , 0 ; #4 db 5 , 0 , 11 , 0 , 0 ; #5 db 8 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 22 , 0 , 67 , 48 ; Maste NO.5 db 8 , 30 , 56 , 60 , 72 ; Echo #1 db 3 , 6 , 40 , 67 , 64 ; #2 db 6 , 15 , 32 , 65 , 48 ; #3 db 4 , 14 , 48 , 67 , 72 ; #4 db 9 , 7 , 11 , 222 , 0 ; #5 db 5 , 0 , 11 , 0 , 0 ; #6 db 7 , 0 , 11 , 0 , 0 ; #7 db 7 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 16 , 0 , 67 , 64 ; Master NO.6 db 6 , 15 , 24 , 60 , 48 ; Echo #1 db 9 , 7 , 48 , 68 , 56 ; #2 db 4 , 14 , 64 , 65 , 72 ; #3 db 5 , 23 , 11 , 222 , 0 ; #4 db 2 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 14 , 0 , 58 , 64 ; Master NO.7 db 9 , 7 , 48 , 60 , 48 ; Echo #1 db 5 , 23 , 11 , 65 , 56 ; #2 db 7 , 13 , 11 , 60 , 64 ; #3 db 3 , 6 , 11 , 67 , 72 ; #4 db 2 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 6 , 15 , 0 , 60 , 64 ; Master NO.8 db 9 , 7 , 56 , 66 , 64 ; Echo #1 db 5 , 13 , 12 , 73 , 72 ; #2 db 7 , 31 , 11 , 222 , 0 ; #3 db 3 , 4 , 11 , 222 , 0 ; #4 db 2 , 0 , 11 , 0 , 0 ; #5 db 4 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 8 , 30 , 0 , 73 , 64 ; Master NO.9 db 3 , 4 , 40 , 66 , 48 ; Echo #1 db 7 , 31 , 80 , 67 , 72 ; #2 db 2 , 0 , 11 , 0 , 0 ; #3 db 4 , 0 , 11 , 0 , 0 ; #4 db 5 , 0 , 11 , 0 , 0 ; #5 db 6 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 31 , 0 , 60 , 64 ; Master NO.10 db 3 , 4 , 48 , 60 , 56 ; Echo #1 db 4 , 5 , 11 , 222 , 0 ; #2 db 2 , 0 , 11 , 0 , 0 ; #3 db 5 , 0 , 11 , 0 , 0 ; #4 db 6 , 0 , 11 , 0 , 0 ; #5 db 8 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 5 , 0 , 60 , 64 ; Master NO.11 db 6 , 15 , 32 , 67 , 56 ; Echo #1 db 3 , 4 , 12 , 65 , 72 ; #2 db 7 , 31 , 80 , 58 , 48 ; #3 db 9 , 7 , 48 , 66 , 64 ; #4 db 5 , 23 , 16 , 73 , 72 ; #5 db 2 , 12 , 11 , 222 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 15 , 0 , 68 , 64 ; Master NO.12 db 7 , 31 , 72 , 67 , 56 ; Echo #1 db 2 , 12 , 40 , 60 , 72 ; #2 db 5 , 23 , 16 , 65 , 48 ; #3 db 8 , 13 , 11 , 222 , 0 ; #4 db 3 , 0 , 11 , 0 , 0 ; #5 db 6 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 4 , 0 , 67 , 64 ; Master NO.13 db 9 , 7 , 16 , 60 , 72 ; Echo #1 db 5 , 23 , 72 , 67 , 48 ; #2 db 7 , 31 , 40 , 73 , 56 ; #3 db 2 , 12 , 8 , 66 , 64 ; #4 db 8 , 13 , 56 , 62 , 48 ; #5 db 6 , 20 , 11 , 222 , 0 ; #6 db 4 , 0 , 11 , 0 , 0 ; #7 db 4 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 4 , 0 , 60 , 64 ; Master NO.14 db 2 , 12 , 72 , 58 , 56 ; Echo #1 db 8 , 13 , 40 , 67 , 64 ; #2 db 3 , 4 , 56 , 73 , 72 ; #3 db 6 , 20 , 8 , 66 , 48 ; #4 db 7 , 28 , 11 , 222 , 0 ; #5 db 4 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 12 , 0 , 60 , 64 ; Master NO.15 db 7 , 28 , 72 , 62 , 72 ; Echo #1 db 3 , 4 , 48 , 69 , 48 ; #2 db 9 , 21 , 11 , 222 , 0 ; #3 db 4 , 0 , 11 , 0 , 0 ; #4 db 5 , 0 , 11 , 0 , 0 ; #5 db 6 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 6 , 20 , 0 , 66 , 64 ; Master NO.16 db 9 , 21 , 32 , 73 , 48 ; Echo #1 db 4 , 5 , 12 , 67 , 72 ; #2 db 7 , 28 , 88 , 60 , 56 ; #3 db 5 , 6 , 11 , 222 , 0 ; #4 db 3 , 14 , 11 , 222 , 0 ; #5 db 2 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 6 , 0 , 62 , 64 ; Master NO.17 db 8 , 13 , 56 , 60 , 72 ; Echo #1 db 3 , 14 , 80 , 67 , 48 ; #2 db 6 , 20 , 20 , 69 , 56 ; #3 db 4 , 29 , 11 , 222 , 0 ; #4 db 2 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 14 , 0 , 67 , 64 ; Master NO.18 db 8 , 13 , 24 , 68 , 48 ; Echo #1 db 4 , 29 , 40 , 75 , 64 ; #2 db 2 , 7 , 11 , 222 , 0 ; #3 db 5 , 0 , 11 , 0 , 0 ; #4 db 6 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 6 , 20 , 0 , 73 , 64 ; Master NO.19 db 2 , 7 , 48 , 73 , 64 ; Echo #1 db 8 , 13 , 24 , 66 , 72 ; #2 db 5 , 6 , 40 , 69 , 48 ; #3 db 3 , 14 , 88 , 62 , 56 ; #4 db 7 , 15 , 11 , 222 , 0 ; #5 db 9 , 31 , 11 , 222 , 0 ; #6 db 4 , 0 , 11 , 0 , 0 ; #7 db 4 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 15 , 0 , 75 , 64 ; Master NO.20 db 2 , 7 , 56 , 68 , 56 ; Echo #1 db 5 , 6 , 36 , 66 , 48 ; #2 db 8 , 13 , 32 , 73 , 72 ; #3 db 6 , 22 , 11 , 222 , 0 ; #4 db 3 , 0 , 11 , 0 , 0 ; #5 db 4 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 8 , 12 , 0 , 75 , 64 ; Master NO.21 db 6 , 22 , 24 , 68 , 64 ; Echo #1 db 9 , 31 , 64 , 75 , 64 ; #2 db 5 , 6 , 40 , 62 , 64 ; #3 db 3 , 14 , 32 , 69 , 64 ; #4 db 2 , 0 , 11 , 0 , 0 ; #5 db 4 , 0 , 11 , 0 , 0 ; #6 db 7 , 0 , 11 , 0 , 0 ; #7 db 7 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 6 , 0 , 69 , 64 ; Master NO.22 db 7 , 15 , 52 , 62 , 64 ; Echo #1 db 4 , 29 , 24 , 68 , 64 ; #2 db 8 , 13 , 64 , 75 , 64 ; #3 db 2 , 7 , 8 , 71 , 64 ; #4 db 6 , 22 , 40 , 64 , 64 ; #5 db 3 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 6 , 0 , 58 , 64 ; Master NO.23 db 2 , 7 , 48 , 60 , 64 ; Echo #1 db 6 , 22 , 16 , 65 , 56 ; #2 db 8 , 4 , 11 , 222 , 0 ; #3 db 3 , 0 , 11 , 0 , 0 ; #4 db 4 , 0 , 11 , 0 , 0 ; #5 db 2 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 31 , 0 , 67 , 64 ; Maste NO.24 db 5 , 6 , 56 , 60 , 72 ; Echo #1 db 2 , 0 , 11 , 0 , 0 ; #2 db 3 , 0 , 11 , 0 , 0 ; #3 db 4 , 0 , 11 , 0 , 0 ; #4 db 6 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 8 , 4 , 0 , 62 , 64 ; Master NO.25 db 3 , 14 , 40 , 69 , 48 ; Echo #1 db 6 , 22 , 56 , 68 , 72 ; #2 db 9 , 31 , 36 , 75 , 56 ; #3 db 2 , 0 , 11 , 0 , 0 ; #4 db 4 , 0 , 11 , 0 , 0 ; #5 db 5 , 0 , 11 , 0 , 0 ; #6 db 7 , 0 , 11 , 0 , 0 ; #7 db 7 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 15 , 0 , 58 , 64 ; Master NO.26 db 4 , 29 , 32 , 65 , 72 ; Echo #1 db 8 , 4 , 88 , 67 , 64 ; #2 db 2 , 30 , 11 , 222 , 0 ; #3 db 3 , 0 , 11 , 0 , 0 ; #4 db 5 , 0 , 11 , 0 , 0 ; #5 db 6 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 31 , 0 , 71 , 64 ; Master NO.27 db 4 , 29 , 44 , 64 , 64 ; Echo #1 db 7 , 15 , 52 , 67 , 64 ; #2 db 2 , 30 , 56 , 60 , 64 ; #3 db 6 , 13 , 11 , 222 , 0 ; #4 db 3 , 0 , 11 , 0 , 0 ; #5 db 5 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 31 , 0 , 60 , 64 ; Master NO.28 db 6 , 13 , 64 , 64 , 64 ; Echo #1 db 2 , 30 , 56 , 71 , 64 ; #2 db 5 , 23 , 11 , 222 , 0 ; #3 db 3 , 0 , 11 , 0 , 0 ; #4 db 4 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 31 , 0 , 62 , 72 ; Master NO.29 db 4 , 29 , 72 , 60 , 48 ; Echo #1 db 6 , 13 , 16 , 67 , 64 ; #2 db 2 , 30 , 48 , 69 , 72 ; #3 db 7 , 15 , 56 , 62 , 48 ; #4 db 3 , 0 , 11 , 222 , 0 ; #5 db 5 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 30 , 0 , 60 , 64 ; Master NO.30 db 5 , 23 , 32 , 67 , 72 ; Echo #1 db 8 , 4 , 12 , 67 , 48 ; #2 db 3 , 20 , 80 , 60 , 64 ; #3 db 4 , 0 , 11 , 0 , 0 ; #4 db 6 , 0 , 11 , 0 , 0 ; #5 db 7 , 0 , 11 , 0 , 0 ; #6 db 9 , 0 , 11 , 0 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 15 , 0 , 71 , 64 ; Master NO.31 db 9 , 31 , 56 , 64 , 72 ; Echo #1 db 5 , 23 , 96 , 67 , 68 ; #2 db 2 , 30 , 32 , 60 , 56 ; #3 db 6 , 13 , 16 , 60 , 64 ; #4 db 3 , 0 , 11 , 0 , 0 ; #5 db 4 , 0 , 11 , 0 , 0 ; #6 db 8 , 0 , 11 , 0 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 0 , 0 , 67 , 96 ; Master NO.32 db 7 , 0 , 12 , 74 , 80 ; Echo #1 db 5 , 0 , 24 , 76 , 112 ; #2 db 9 , 0 , 16 , 69 , 96 ; #3 db 3 , 0 , 20 , 68 , 64 ; #4 db 8 , 0 , 8 , 61 , 80 ; #5 db 6 , 0 , 12 , 65 , 96 ; #6 db 4 , 0 , 16 , 72 , 112 ; #7 db 2 , 0 , 24 , 67 , 96 ; #8 ;--------------------------------------------------------------- db 3 , 0 , 0 , 67 , 96 ; Master NO.33 db 8 , 0 , 16 , 67 , 112 ; Echo #1 db 4 , 0 , 12 , 74 , 80 ; #2 db 7 , 0 , 24 , 67 , 64 ; #3 db 5 , 0 , 16 , 68 , 96 ; #4 db 2 , 0 , 8 , 61 , 80 ; #5 db 6 , 0 , 20 , 65 , 112 ; #6 db 9 , 0 , 12 , 72 , 96 ; #7 db 3 , 0 , 8 , 74 , 96 ; #8 ;--------------------------------------------------------------- db 4 , 0 , 0 , 63 , 96 ; Master NO.34 db 2 , 0 , 12 , 70 , 96 ; Echo #1 db 5 , 0 , 8 , 74 , 80 ; #2 db 9 , 0 , 16 , 76 , 112 ; #3 db 6 , 0 , 20 , 67 , 96 ; #4 db 8 , 0 , 24 , 66 , 64 ; #5 db 3 , 0 , 8 , 69 , 112 ; #6 db 7 , 0 , 16 , 59 , 80 ; #7 db 4 , 0 , 12 , 65 , 96 ; #8 ;--------------------------------------------------------------- db 5 , 0 , 0 , 72 , 96 ; Master NO.35 db 9 , 0 , 8 , 66 , 64 ; Echo #1 db 6 , 0 , 24 , 59 , 96 ; #2 db 4 , 0 , 20 , 65 , 112 ; #3 db 8 , 0 , 16 , 67 , 80 ; #4 db 2 , 0 , 20 , 74 , 96 ; #5 db 7 , 0 , 8 , 63 , 112 ; #6 db 3 , 0 , 12 , 70 , 80 ; #7 db 5 , 0 , 16 , 76 , 96 ; #8 ;--------------------------------------------------------------- db 6 , 0 , 0 , 76 , 96 ; Master NO.36 db 8 , 0 , 16 , 69 , 112 ; Echo #1 db 2 , 0 , 16 , 67 , 112 ; #2 db 5 , 0 , 8 , 74 , 80 ; #3 db 3 , 0 , 20 , 68 , 64 ; #4 db 7 , 0 , 12 , 61 , 96 ; #5 db 9 , 0 , 16 , 63 , 96 ; #6 db 4 , 0 , 24 , 70 , 80 ; #7 db 6 , 0 , 8 , 76 , 96 ; #8 ;--------------------------------------------------------------- db 7 , 0 , 0 , 74 , 96 ; Master NO.37 db 2 , 0 , 8 , 67 , 96 ; Echo #1 db 5 , 0 , 20 , 61 , 112 ; #2 db 8 , 0 , 12 , 68 , 64 ; #3 db 6 , 0 , 8 , 70 , 112 ; #4 db 3 , 0 , 16 , 63 , 80 ; #5 db 9 , 0 , 8 , 65 , 96 ; #6 db 4 , 0 , 12 , 72 , 80 ; #7 db 7 , 0 , 8 , 67 , 96 ; #8 ;--------------------------------------------------------------- db 8 , 0 , 0 , 76 , 96 ; Master NO.38 db 4 , 0 , 12 , 76 , 64 ; Echo #1 db 9 , 0 , 8 , 69 , 80 ; #2 db 5 , 0 , 16 , 67 , 96 ; #3 db 3 , 0 , 8 , 74 , 112 ; #4 db 7 , 0 , 8 , 70 , 112 ; #5 db 2 , 0 , 20 , 63 , 96 ; #6 db 6 , 0 , 12 , 59 , 96 ; #7 db 8 , 0 , 16 , 66 , 80 ; #8 ;--------------------------------------------------------------- db 9 , 0 , 0 , 67 , 96 ; Master NO.39 db 7 , 0 , 8 , 74 , 80 ; Echo #1 db 3 , 0 , 12 , 69 , 112 ; #2 db 6 , 0 , 8 , 76 , 96 ; #3 db 2 , 0 , 16 , 68 , 64 ; #4 db 5 , 0 , 8 , 61 , 96 ; #5 db 8 , 0 , 8 , 72 , 96 ; #6 db 4 , 0 , 12 , 65 , 80 ; #7 db 9 , 0 , 16 , 67 , 112 ; #8 ;--------------------------------------------------------------- db 2 , 0 , 0 , 69 , 96 ; Master NO.40 db 7 , 0 , 12 , 76 , 80 ; Echo #1 db 5 , 0 , 24 , 67 , 112 ; #2 db 9 , 0 , 16 , 74 , 96 ; #3 db 3 , 0 , 20 , 68 , 64 ; #4 db 8 , 0 , 8 , 61 , 80 ; #5 db 6 , 0 , 12 , 72 , 96 ; #6 db 4 , 0 , 16 , 65 , 112 ; #7 db 2 , 40 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 0 , 0 , 76 , 96 ; Master NO.41 db 8 , 0 , 16 , 69 , 112 ; Echo #1 db 4 , 0 , 12 , 66 , 80 ; #2 db 7 , 0 , 24 , 59 , 64 ; #3 db 5 , 0 , 16 , 63 , 96 ; #4 db 2 , 0 , 8 , 70 , 80 ; #5 db 6 , 0 , 20 , 72 , 112 ; #6 db 9 , 0 , 12 , 65 , 96 ; #7 db 3 , 41 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 0 , 0 , 74 , 96 ; Master NO.42 db 2 , 0 , 12 , 67 , 96 ; Echo #1 db 5 , 0 , 8 , 68 , 80 ; #2 db 9 , 0 , 16 , 61 , 112 ; #3 db 6 , 0 , 20 , 67 , 96 ; #4 db 8 , 0 , 24 , 74 , 64 ; #5 db 3 , 0 , 8 , 74 , 112 ; #6 db 7 , 0 , 16 , 67 , 80 ; #7 db 4 , 42 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 0 , 0 , 67 , 96 ; Master NO.43 db 9 , 0 , 8 , 74 , 64 ; Echo #1 db 6 , 0 , 24 , 68 , 96 ; #2 db 4 , 0 , 20 , 61 , 112 ; #3 db 8 , 0 , 16 , 69 , 80 ; #4 db 2 , 0 , 20 , 76 , 96 ; #5 db 7 , 0 , 8 , 74 , 112 ; #6 db 3 , 0 , 12 , 67 , 80 ; #7 db 5 , 43 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 6 , 0 , 0 , 72 , 96 ; Master NO.44 db 8 , 0 , 16 , 65 , 112 ; Echo #1 db 2 , 0 , 16 , 66 , 112 ; #2 db 5 , 0 , 8 , 59 , 80 ; #3 db 3 , 0 , 20 , 63 , 64 ; #4 db 7 , 0 , 12 , 70 , 96 ; #5 db 9 , 0 , 16 , 74 , 96 ; #6 db 4 , 0 , 24 , 74 , 80 ; #7 db 6 , 44 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 0 , 0 , 67 , 96 ; Master NO.45 db 2 , 0 , 8 , 69 , 96 ; Echo #1 db 5 , 0 , 20 , 76 , 112 ; #2 db 8 , 0 , 12 , 69 , 64 ; #3 db 6 , 0 , 8 , 74 , 112 ; #4 db 3 , 0 , 16 , 67 , 80 ; #5 db 9 , 0 , 8 , 68 , 96 ; #6 db 4 , 0 , 12 , 61 , 80 ; #7 db 7 , 45 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 8 , 0 , 0 , 76 , 96 ; Master NO.46 db 4 , 0 , 12 , 74 , 64 ; Echo #1 db 9 , 0 , 8 , 67 , 80 ; #2 db 5 , 0 , 16 , 74 , 96 ; #3 db 3 , 0 , 8 , 74 , 112 ; #4 db 7 , 0 , 8 , 67 , 112 ; #5 db 2 , 0 , 20 , 74 , 96 ; #6 db 6 , 0 , 12 , 74 , 96 ; #7 db 8 , 46 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 0 , 0 , 67 , 96 ; Master NO.47 db 7 , 0 , 8 , 74 , 80 ; Echo #1 db 3 , 0 , 12 , 69 , 112 ; #2 db 6 , 0 , 8 , 76 , 96 ; #3 db 2 , 0 , 16 , 69 , 64 ; #4 db 5 , 0 , 8 , 68 , 96 ; #5 db 8 , 0 , 8 , 61 , 96 ; #6 db 4 , 0 , 12 , 68 , 80 ; #7 db 9 , 47 , 11 , 222 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 0 , 0 , 67 , 96 ; Master NO.48 db 7 , 0 , 12 , 69 , 80 ; Echo #1 db 5 , 0 , 24 , 76 , 112 ; #2 db 9 , 0 , 16 , 74 , 96 ; #3 db 3 , 0 , 20 , 74 , 64 ; #4 db 8 , 0 , 8 , 68 , 80 ; #5 db 6 , 0 , 12 , 61 , 96 ; #6 db 4 , 20 , 11 , 222 , 0 ; #7 db 2 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 0 , 0 , 67 , 96 ; Master NO.49 db 8 , 0 , 16 , 74 , 112 ; Echo #1 db 4 , 0 , 12 , 68 , 80 ; #2 db 7 , 0 , 24 , 61 , 64 ; #3 db 5 , 0 , 16 , 72 , 96 ; #4 db 2 , 0 , 8 , 65 , 80 ; #5 db 6 , 0 , 20 , 65 , 112 ; #6 db 9 , 21 , 11 , 222 , 0 ; #7 db 3 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 0 , 0 , 72 , 96 ; Master NO.50 db 2 , 0 , 12 , 65 , 96 ; Echo #1 db 5 , 0 , 8 , 66 , 80 ; #2 db 9 , 0 , 16 , 66 , 112 ; #3 db 6 , 0 , 20 , 59 , 96 ; #4 db 8 , 0 , 24 , 67 , 64 ; #5 db 3 , 0 , 8 , 74 , 112 ; #6 db 7 , 22 , 11 , 222 , 0 ; #7 db 4 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 0 , 0 , 76 , 96 ; Master NO.51 db 9 , 0 , 8 , 76 , 64 ; Echo #1 db 6 , 0 , 24 , 74 , 96 ; #2 db 4 , 0 , 20 , 67 , 112 ; #3 db 8 , 0 , 16 , 74 , 80 ; #4 db 2 , 0 , 20 , 67 , 96 ; #5 db 7 , 0 , 8 , 69 , 112 ; #6 db 3 , 23 , 11 , 222 , 0 ; #7 db 5 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 6 , 0 , 0 , 67 , 96 ; Master NO.52 db 8 , 0 , 16 , 74 , 112 ; Echo #1 db 2 , 0 , 16 , 74 , 112 ; #2 db 5 , 0 , 8 , 66 , 80 ; #3 db 3 , 0 , 20 , 59 , 64 ; #4 db 7 , 0 , 12 , 70 , 96 ; #5 db 9 , 0 , 16 , 63 , 96 ; #6 db 6 , 28 , 11 , 222 , 0 ; #7 db 4 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 0 , 0 , 74 , 96 ; Master NO.53 db 2 , 0 , 8 , 67 , 96 ; Echo #1 db 5 , 0 , 20 , 74 , 112 ; #2 db 9 , 0 , 12 , 76 , 64 ; #3 db 3 , 0 , 8 , 69 , 112 ; #4 db 6 , 0 , 16 , 67 , 80 ; #5 db 4 , 0 , 8 , 67 , 96 ; #6 db 8 , 29 , 11 , 222 , 0 ; #7 db 7 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 8 , 0 , 0 , 74 , 96 ; Master NO.54 db 4 , 0 , 12 , 67 , 64 ; Echo #1 db 9 , 0 , 8 , 74 , 80 ; #2 db 6 , 0 , 16 , 76 , 96 ; #3 db 3 , 0 , 8 , 69 , 112 ; #4 db 7 , 0 , 8 , 63 , 112 ; #5 db 2 , 0 , 20 , 70 , 96 ; #6 db 5 , 30 , 11 , 222 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 0 , 0 , 67 , 96 ; Master NO.55 db 7 , 0 , 8 , 74 , 80 ; Echo #1 db 3 , 0 , 12 , 69 , 112 ; #2 db 6 , 0 , 8 , 76 , 96 ; #3 db 4 , 0 , 16 , 68 , 64 ; #4 db 5 , 0 , 8 , 61 , 96 ; #5 db 8 , 0 , 8 , 68 , 96 ; #6 db 2 , 31 , 11 , 222 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 2 , 0 , 0 , 67 , 96 ; Master NO.56 db 7 , 0 , 12 , 69 , 80 ; Echo #1 db 5 , 0 , 24 , 76 , 112 ; #2 db 9 , 0 , 16 , 74 , 96 ; #3 db 3 , 0 , 20 , 68 , 64 ; #4 db 8 , 0 , 8 , 61 , 80 ; #5 db 6 , 40 , 11 , 222 , 0 ; #6 db 4 , 31 , 11 , 222 , 0 ; #7 db 2 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 3 , 0 , 0 , 76 , 96 ; Master NO.57 db 8 , 0 , 16 , 74 , 112 ; Echo #1 db 4 , 0 , 12 , 67 , 80 ; #2 db 7 , 0 , 24 , 74 , 64 ; #3 db 5 , 0 , 16 , 67 , 96 ; #4 db 2 , 0 , 8 , 69 , 80 ; #5 db 6 , 30 , 11 , 222 , 0 ; #6 db 9 , 41 , 11 , 222 , 0 ; #7 db 3 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 4 , 0 , 0 , 74 , 96 ; Master NO.58 db 2 , 0 , 12 , 67 , 96 ; Echo #1 db 5 , 0 , 8 , 67 , 80 ; #2 db 9 , 0 , 16 , 74 , 112 ; #3 db 6 , 0 , 20 , 74 , 96 ; #4 db 8 , 0 , 24 , 67 , 64 ; #5 db 3 , 42 , 11 , 222 , 0 ; #6 db 7 , 29 , 11 , 222 , 0 ; #7 db 4 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 5 , 0 , 0 , 67 , 96 ; Master NO.59 db 9 , 0 , 8 , 74 , 64 ; Echo #1 db 6 , 0 , 24 , 76 , 96 ; #2 db 4 , 0 , 20 , 69 , 112 ; #3 db 8 , 0 , 16 , 63 , 80 ; #4 db 2 , 0 , 20 , 70 , 96 ; #5 db 7 , 43 , 11 , 222 , 0 ; #6 db 3 , 28 , 11 , 222 , 0 ; #7 db 5 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 6 , 0 , 0 , 67 , 96 ; Master NO.60 db 8 , 0 , 16 , 74 , 112 ; Echo #1 db 2 , 0 , 16 , 66 , 112 ; #2 db 5 , 0 , 8 , 59 , 80 ; #3 db 3 , 0 , 20 , 70 , 64 ; #4 db 7 , 0 , 12 , 63 , 96 ; #5 db 9 , 23 , 11 , 222 , 0 ; #6 db 4 , 44 , 11 , 222 , 0 ; #7 db 6 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 7 , 0 , 0 , 72 , 96 ; Master NO.61 db 4 , 0 , 8 , 65 , 96 ; Echo #1 db 5 , 0 , 20 , 66 , 112 ; #2 db 9 , 0 , 12 , 59 , 64 ; #3 db 6 , 0 , 8 , 67 , 112 ; #4 db 3 , 0 , 16 , 74 , 80 ; #5 db 8 , 45 , 11 , 222 , 0 ; #6 db 2 , 22 , 11 , 222 , 0 ; #7 db 7 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 8 , 0 , 0 , 67 , 96 ; Master NO.62 db 4 , 0 , 12 , 74 , 64 ; Echo #1 db 9 , 0 , 8 , 68 , 80 ; #2 db 6 , 0 , 16 , 61 , 96 ; #3 db 3 , 0 , 8 , 72 , 112 ; #4 db 7 , 0 , 8 , 65 , 112 ; #5 db 2 , 46 , 11 , 222 , 0 ; #6 db 5 , 21 , 11 , 222 , 0 ; #7 db 8 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- db 9 , 0 , 0 , 74 , 96 ; Master NO.63 db 7 , 0 , 8 , 74 , 80 ; Echo #1 db 3 , 0 , 12 , 67 , 112 ; #2 db 6 , 0 , 8 , 68 , 96 ; #3 db 2 , 0 , 16 , 61 , 64 ; #4 db 4 , 0 , 8 , 68 , 96 ; #5 db 8 , 20 , 11 , 222 , 0 ; #6 db 5 , 47 , 11 , 222 , 0 ; #7 db 9 , 0 , 11 , 0 , 0 ; #8 ;--------------------------------------------------------------- end