;-----------------------------------------------------------------------
;	[PEGASUS-10] : [Indy Box] CPU (2) Indy Filter : May 1995
;-----------------------------------------------------------------------
;	[AE] [nn] [para] : Polyphonic Key Pressure
;		nn =  5 : 100 * n	LED Display
;		      6 :  10 * n	LED Display
;		      7 :   1 * n	LED Display
;		      8 :  (off) 	LED OFF
;		     21 : Channel Filter bitmap : CH1-CH4 [1=on]
;		     22 : Channel Filter bitmap : CH5-CH8 [1=on]
;		     23 : Channel Filter bitmap : CH9-CH12 [1=on]
;		     24 : Channel Filter bitmap : CH13-CH16 [1=on]
;						(Default : CH16 only ON)
;		     25 : Status Filter bitmap : [1=on]
;                              bit6   5   4   3   2   1   0
;				 8n  9n  An  Bn  Cn  Dn  En
;						(Default : <Bn> ON)
;		     26 : Setting Default Paratemers (only <BF> ON)
;-----------------------------------------------------------------------

;##### RAM Map #####
	dseg
	org	0000h
rx_fifo		ds	8192
tx_fifo		ds	8192
rx_top		ds	2
rx_end		ds	2
rsb		ds	1
dcb		ds	1
channel		ds	1
keyno		ds	1
rxdata		ds	1
tx_top		ds	2
tx_end		ds	2
timer		ds	3
pass_map	ds	256
mode		ds	1
map_0_3		ds	1
map_4_7		ds	1
map_8_B		ds	1
map_C_F		ds	1
map_status	ds	1

;##### I/O Map #####
	cseg
sio_b		equ	001ah
pio_a		equ	001ch
pio_b		equ	001eh

;##### MACRO #####
io_set	macro	@1,@2
	ld	a,@2
	out	(@1+1),a
	endm
io_put	macro	@1,@2
	ld	a,@2
	out	(@1+0),a
	endm

;##### RESET #####
	org	0000h
	ld      sp,0ffffh
	di
	jp      main

;##### INT / NMI #####
	org     0020h
	dw	_midi_
_midi_:
	ex	af,af'
	exx
	ld	de,(rx_top)
	ld	a,10000000b
	or	d
	ld	h,a
	ld	l,e
	in	a,(sio_b+0)
	ld	(hl),a
	inc	de
	res	5,d
	ld	(rx_top),de
	exx
	ex	af,af'
	ei
	reti
	org     0066h
	retn

;##### Main #####
main:
	ld      hl,08000h
	ld      c,0e0h
_ram_check_loop:
	ld	b,11111111b
	ld      (hl),b
	ld	a,(hl)
	cp	b
	jr	nz,_ram_check_loop
	ld	b,00000000b
	ld      (hl),b
	ld	a,(hl)
	cp	b
	jr	nz,_ram_check_loop
	inc     hl
	ld	a,c
	cp      h
	jr	nc,_ram_check_loop
	io_set	pio_a,0cfh		; Mode 3
	io_set	pio_a,00000000b		; 0:Out / 1:In
	io_set	pio_a,007h		; Interrupt Disable
	io_put	pio_a,11111111b		;
	io_set	pio_b,0cfh		; Mode 3
	io_set	pio_b,00000000b		; 0:Out / 1:In
	io_set	pio_b,007h		; Interrupt Disable
	io_put	pio_b,11111111b		;
	io_put	pio_a,11111000b		;
	io_put	pio_a,11111111b		;
	io_set	sio_b,00011000b		; Channel Reset B
	io_set	sio_b,00000100b		; Resister Point = 4
	io_set	sio_b,01000100b		; Mode
	io_set	sio_b,00000001b		; Resister Point = 1
	io_set	sio_b,00011000b		; Interrupt Mode
	io_set	sio_b,00000010b		; Resister Point = 2
	io_set	sio_b,020h		; Vector Address
	xor	a
	ld	i,a			; High Address
	io_set	sio_b,00000101b		; Resister Point = 5
	io_set	sio_b,01101000b		; Transmit Start
	io_set	sio_b,00000011b		; Resister Point = 3
	io_set	sio_b,11000001b		; Receive Start
	call	default_set
	im	2
	ei
	in	a,(sio_b+0)		; dummy read
loop:
	call	rx_data_check
	call	tx_fifo_check
	call	timer_check
	jr	loop

tx_fifo_set:
	push	hl
	push	de
	ld	de,(tx_top)
	ld	a,10100000b
	or	d
	ld	h,a
	ld	l,e
	ld	(hl),b
	inc	de
	res	5,d
	ld	(tx_top),de
	pop	de
	pop	hl
	ret
tx_fifo_check:
	ld	de,(tx_end)
	ld	hl,(tx_top)
	and	a			; CY <-- 0
	sbc	hl,de
	ret	z
	io_set	sio_b,00000000b		; Resister Point = 0
	in	a,(sio_b+1)
	bit	2,a
	ret	z
	ld	a,10100000b
	or	d
	ld	h,a
	ld	l,e
	ld	a,(hl)
	out	(sio_b+0),a
	inc	de
	res	5,d
	ld	(tx_end),de
	ret

timer_check:
	ld	a,(mode)
	cp	0
	ret	nz
	ld	a,(timer+0)
	inc	a
	ld	(timer+0),a
	ret	nz
	ld	a,(timer+1)
	inc	a
	ld	(timer+1),a
	and	00001111b
	ret	nz
	ld	a,(timer+2)
	inc	a
	cp	13
	jr	nz,_demo
	xor	a
_demo:
	ld	(timer+2),a
	call	led_display
	ld	a,11111011b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,(timer+2)
	dec	a
	call	led_display
	ld	a,11111101b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,(timer+2)
	dec	a
	dec	a
	call	led_display
	ld	a,11111110b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ret

rx_data_check:
	ld	de,(rx_end)
	ld	hl,(rx_top)
	and	a			; CY <-- 0
	sbc	hl,de
	ret	z
	ld	a,10000000b
	or	d
	ld	h,a
	ld	l,e
	ld	b,(hl)
	inc	de
	res	5,d
	ld	(rx_end),de
	bit	7,b
	jr	z,50$			; running
	ld	a,b
	cp	0f8h
	ret	nc
	cp	0f0h
	jr	c,10$
	xor	a
	ld	(rsb),a
	ret
10$:
	ld	a,b
	and	00001111b
	ld	(channel),a
	ld	a,b
	and	11110000b
	ld	(rsb),a
	xor	a
	ld	(dcb),a
	ret
50$:
	ld	a,(rsb)
	cp	0
	ret	z
	cp	0c0h
	jr	z,70$
	cp	0d0h
	jr	z,70$
	ld	a,(dcb)
	cp	0
	jr	nz,90$
	inc	a
	ld	(dcb),a
	ld	a,b
	ld	(keyno),a
	ret
70$:
	ld	c,b
	ld	a,(rsb)
	ld	d,a
	ld	a,(channel)
	or	d
	ld	e,a
	ld	d,0
	ld	hl,pass_map
	add	hl,de
	ld	a,(hl)
	cp	0
	ret	z
	ld	b,e
	call	tx_fifo_set
	ld	b,c
	call	tx_fifo_set
	call	st_disp
	ret
90$:
	ld	a,b
	ld	(rxdata),a
	xor	a
	ld	(dcb),a
	ld	c,b
	ld	a,(rsb)
	ld	d,a
	ld	a,(channel)
	or	d
	ld	e,a
	ld	d,0
	ld	hl,pass_map
	add	hl,de
	ld	a,(hl)
	cp	0
	jr	z,_passed
	ld	b,e
	call	tx_fifo_set
	ld	a,(keyno)
	ld	b,a
	call	tx_fifo_set
	ld	b,c
	call	tx_fifo_set
	call	st_disp
_passed:
	ld	a,(rsb)
	cp	0a0h
	ret	nz
	ld	a,(channel)
	cp	00eh
	ret	nz
	ld	a,(keyno)
	cp	5
	jr	z,__100
	cp	6
	jr	z,__10
	cp	7
	jr	z,__1
	cp	8
	jr	z,__0
	cp	21
	jp	z,__21
	cp	22
	jp	z,__22
	cp	23
	jp	z,__23
	cp	24
	jp	z,__24
	cp	25
	jp	z,__25
	cp	26
	jp	z,__26
	ret
__100:
	ld	a,c
	call	led_display
	ld	a,11111110b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,2
	ld	(mode),a
	ret
__10:
	ld	a,c
	call	led_display
	ld	a,11111101b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,2
	ld	(mode),a
	ret
__1:
	ld	a,c
	call	led_display
	ld	a,11111011b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,2
	ld	(mode),a
	ret
__0:
	ld	a,0fh
	call	led_display
	ld	a,11111000b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,2
	ld	(mode),a
	ret
led_display:
	and	00001111b
	ld	l,a
	ld	h,0
	ld	bc,data_table
	add	hl,bc
	ld	a,(hl)
	out	(pio_b+0),a
	ret
data_table:
	db	10010000b,11011011b,10100010b,10001010b		; 0-3
	db	11001001b,10001100b,10000100b,11011000b		; 4-7
	db	10000000b,11001000b,11111111b,11111111b		; 8-B
	db	11111111b,11111111b,11111111b,11111111b		; C-F

default_set:
	ld	hl,pass_map
	ld	a,0
_df_1:
	ld	(hl),0
	inc	hl
	dec	a
	jr	nz,_df_1
	ld	a,1
	ld	(pass_map+0bfh),a
	ld	a,0
	ld	(map_0_3),a
	ld	(map_4_7),a
	ld	(map_8_B),a
	ld	a,00001000b
	ld	(map_C_F),a
	ld	(map_status),a
	ret

st_disp:
	ld	a,(mode)
	cp	2
	ret	z
	ld	a,1
	ld	(mode),a
	res	7,e
	ld	d,0
	ld	hl,table_100
	add	hl,de
	ld	a,(hl)
	call	led_display
	ld	a,11111110b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	hl,table_10
	add	hl,de
	ld	a,(hl)
	call	led_display
	ld	a,11111101b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	hl,table_1
	add	hl,de
	ld	a,(hl)
	call	led_display
	ld	a,11111011b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ret
table_1:
	db	8,9				; 128-129
	db	0,1,2,3,4,5,6,7,8,9		; 130-139
	db	0,1,2,3,4,5,6,7,8,9		; 140-149
	db	0,1,2,3,4,5,6,7,8,9		; 150-159
	db	0,1,2,3,4,5,6,7,8,9		; 160-169
	db	0,1,2,3,4,5,6,7,8,9		; 170-179
	db	0,1,2,3,4,5,6,7,8,9		; 180-189
	db	0,1,2,3,4,5,6,7,8,9		; 190-199
	db	0,1,2,3,4,5,6,7,8,9		; 200-209
	db	0,1,2,3,4,5,6,7,8,9		; 210-219
	db	0,1,2,3,4,5,6,7,8,9		; 220-229
	db	0,1,2,3,4,5,6,7,8,9		; 230-239
	db	0,1,2,3,4,5,6,7,8,9		; 240-249
	db	0,1,2,3,4,5        		; 250-255
table_10:
	db	2,2				; 128-129
	db	3,3,3,3,3,3,3,3,3,3		; 130-139
	db	4,4,4,4,4,4,4,4,4,4		; 140-149
	db	5,5,5,5,5,5,5,5,5,5		; 150-159
	db	6,6,6,6,6,6,6,6,6,6		; 160-169
	db	7,7,7,7,7,7,7,7,7,7		; 170-179
	db	8,8,8,8,8,8,8,8,8,8		; 180-189
	db	9,9,9,9,9,9,9,9,9,9		; 190-199
	db	0,0,0,0,0,0,0,0,0,0		; 200-209
	db	1,1,1,1,1,1,1,1,1,1		; 210-219
	db	2,2,2,2,2,2,2,2,2,2		; 220-229
	db	3,3,3,3,3,3,3,3,3,3		; 230-239
	db	4,4,4,4,4,4,4,4,4,4		; 240-249
	db	5,5,5,5,5,5        		; 250-255
table_100:
	db	1,1				; 128-129
	db	1,1,1,1,1,1,1,1,1,1		; 130-139
	db	1,1,1,1,1,1,1,1,1,1		; 140-149
	db	1,1,1,1,1,1,1,1,1,1		; 150-159
	db	1,1,1,1,1,1,1,1,1,1		; 160-169
	db	1,1,1,1,1,1,1,1,1,1		; 170-179
	db	1,1,1,1,1,1,1,1,1,1		; 180-189
	db	1,1,1,1,1,1,1,1,1,1		; 190-199
	db	2,2,2,2,2,2,2,2,2,2		; 200-209
	db	2,2,2,2,2,2,2,2,2,2		; 210-219
	db	2,2,2,2,2,2,2,2,2,2		; 220-229
	db	2,2,2,2,2,2,2,2,2,2		; 230-239
	db	2,2,2,2,2,2,2,2,2,2		; 240-249
	db	2,2,2,2,2,2        		; 250-255

__26:
	call	default_set
	ld	a,0fh
	call	led_display
	ld	a,11111000b
	out	(pio_a+0),a
	ld	a,11111111b
	out	(pio_a+0),a
	ld	a,1
	ld	(mode),a
	ret
__21:
	ld	a,(rxdata)
	and	00001111b
	ld	(map_0_3),a
	call	map_setting
	ret
__22:
	ld	a,(rxdata)
	and	00001111b
	ld	(map_4_7),a
	call	map_setting
	ret
__23:
	ld	a,(rxdata)
	and	00001111b
	ld	(map_8_B),a
	call	map_setting
	ret
__24:
	ld	a,(rxdata)
	and	00001111b
	ld	(map_C_F),a
	call	map_setting
	ret
__25:
	ld	a,(rxdata)
	and	01111111b
	ld	(map_status),a
	call	map_setting
	ret
map_setting:
	ld	hl,pass_map+128
	ld	a,128
_mps_loop:
	ld	(hl),0
	inc	hl
	dec	a
	jr	nz,_mps_loop
	ld	e,0			; Channel
	ld	a,(map_0_3)
	bit	0,a
	jr	z,_mps_0
	call	and_status
_mps_0:
	ld	e,1			; Channel
	ld	a,(map_0_3)
	bit	1,a
	jr	z,_mps_1
	call	and_status
_mps_1:
	ld	e,2			; Channel
	ld	a,(map_0_3)
	bit	2,a
	jr	z,_mps_2
	call	and_status
_mps_2:
	ld	e,3			; Channel
	ld	a,(map_0_3)
	bit	3,a
	jr	z,_mps_3
	call	and_status
_mps_3:
	ld	e,4			; Channel
	ld	a,(map_4_7)
	bit	0,a
	jr	z,_mps_4
	call	and_status
_mps_4:
	ld	e,5			; Channel
	ld	a,(map_4_7)
	bit	1,a
	jr	z,_mps_5
	call	and_status
_mps_5:
	ld	e,6			; Channel
	ld	a,(map_4_7)
	bit	2,a
	jr	z,_mps_6
	call	and_status
_mps_6:
	ld	e,7			; Channel
	ld	a,(map_4_7)
	bit	3,a
	jr	z,_mps_7
	call	and_status
_mps_7:
	ld	e,8			; Channel
	ld	a,(map_8_B)
	bit	0,a
	jr	z,_mps_8
	call	and_status
_mps_8:
	ld	e,9			; Channel
	ld	a,(map_8_B)
	bit	1,a
	jr	z,_mps_9
	call	and_status
_mps_9:
	ld	e,10			; Channel
	ld	a,(map_8_B)
	bit	2,a
	jr	z,_mps_10
	call	and_status
_mps_10:
	ld	e,11			; Channel
	ld	a,(map_8_B)
	bit	3,a
	jr	z,_mps_11
	call	and_status
_mps_11:
	ld	e,12			; Channel
	ld	a,(map_C_F)
	bit	0,a
	jr	z,_mps_12
	call	and_status
_mps_12:
	ld	e,13			; Channel
	ld	a,(map_C_F)
	bit	1,a
	jr	z,_mps_13
	call	and_status
_mps_13:
	ld	e,14			; Channel
	ld	a,(map_C_F)
	bit	2,a
	jr	z,_mps_14
	call	and_status
_mps_14:
	ld	e,15			; Channel
	ld	a,(map_C_F)
	bit	3,a
	jr	z,_mps_15
	call	and_status
_mps_15:
	ret

and_status:
	ld	bc,pass_map
	ld	a,(map_status)
	bit	6,a
	jr	z,_ans_6
	ld	a,e
	or	080h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_6:
	ld	a,(map_status)
	bit	5,a
	jr	z,_ans_5
	ld	a,e
	or	090h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_5:
	ld	a,(map_status)
	bit	4,a
	jr	z,_ans_4
	ld	a,e
	or	0a0h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_4:
	ld	a,(map_status)
	bit	3,a
	jr	z,_ans_3
	ld	a,e
	or	0b0h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_3:
	ld	a,(map_status)
	bit	2,a
	jr	z,_ans_2
	ld	a,e
	or	0c0h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_2:
	ld	a,(map_status)
	bit	1,a
	jr	z,_ans_1
	ld	a,e
	or	0d0h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_1:
	ld	a,(map_status)
	bit	0,a
	jr	z,_ans_0
	ld	a,e
	or	0e0h
	ld	l,a
	ld	h,0
	add	hl,bc
	ld	a,1
	ld	(hl),a
_ans_0:
	ret

	end